No.
Actually, there is something to be said for a faster CPLD, even if the bus runs at 33mhz. Anybody who tells you different doesn't understand the issues involved. Also important is the resources available on the CPLD (Gates, Cels)
Complex operations take multiple cycles to accomplish. Faster CPLD == More complex operations.
I was actually involved with a project to encode an application that took color imager input, in real time, and analyzed it to determine control over another device (Can't tell you more than that). Faster speed was better, because even though we only handled data coming in at a particular rate, the complexity we could handle varying situations depended on finishing the entire image analysis within a specific number of cycles (during the vertical blank).
This is not to defend the silly chart, but rather to explain that the haters are way off base on this one.