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[kipper2k]

QUOTE(Blackaddr @ Dec 6 2011, 04:03 AM)

As for changing the source code, Gligli posted all his source code to build your own JED on github.  Try to compile his source code as-is using the free ISE Webpack tools (you can probably find general tutorials and guides on using ISE on the web, and ask around for help).  Make sure you can compile the unaltered code, program the CPLD and it still works.  This proves you're compiling correctly.  Just learning this part will be the hardest, but it's worthwhile.

Then, find the following line in slim.vhd:

constant WIDTH_RESET_START  : integer := 17357;

That's the one you will change.

Try changing the value from 17357 to 17358.  See if it still works, does it work better?  Try 17356, same thing, does it still work, is it any more reliable?

It probably sounds like a pain to have to change the code, recompile, reprogram and test.  But If 17357 isn't already optimal for your console, then the best value will be very close, like, +/1 or +/- 2 at the most, so you really don't need to try many different values.

 Is anyone willing to share and post  a jed file (or 3) for the slim that has already been recompiled with the different values

thanks

[kipper2k]

QUOTE(cornnatron @ Dec 11 2011, 10:59 PM)

very much tnx for the tip blackaddr now booting 5sec constantly still sometimes takes 15 sec but no longer.
had to use +1 on mine with 1 inch cable and 270uf on matrix glitcher

here for the people who cant compile
trinity timing files cpld
explanation inside

 Many thanx, A gentleman and a scholar

[DrZeus]

QUOTE(cornnatron @ Dec 11 2011, 09:59 PM)

very much tnx for the tip blackaddr now booting 5sec constantly still sometimes takes 15 sec but no longer.
had to use +1 on mine with 1 inch cable and 270uf on matrix glitcher

here for the people who cant compile
trinity timing files cpld
explanation inside

Wow very interesting. I would like to try different timings on some Zephyr's that just wont glitch no matter what I do.  I wonder if it might help.  Is there any chance you can do the same and compile for Zephyr's. maybe go +5 either way, I'd really appreciate it as I don't have ISE

Cheers

[cornnatron]

QUOTE(DrZeus @ Dec 12 2011, 10:01 AM)

Wow very interesting. I would like to try different timings on some Zephyr's that just wont glitch no matter what I do.  I wonder if it might help.  Is there any chance you can do the same and compile for Zephyr's. maybe go +5 either way, I'd really appreciate it as I don't have ISE

Cheers

 
Ill see what i can do tonight ,at work at the moment
And also i aint got no way to test So thats some thing you have to
Do yourself

[cornnatron]

allright as requested

diff zephyr timming files

zephyr cpld files

[dokworm]

QUOTE(cornnatron @ Dec 12 2011, 12:26 PM)

Ill see what i can do tonight ,at work at the moment .
And also i aint got no way to test zephyrs .
So thats some thing you have to do yourself.

One last thing wich file do you use normaly on the zephyr?

Wow, thanks, you should really start a new thread for this, everyone would be better off doing this rather than messing with unreliable coils of wire or add-on boards.

[DrZeus]

QUOTE(cornnatron @ Dec 12 2011, 09:52 PM)

allright as requested

diff zephyr timming files

zephyr cpld files

Thanks heaps mate, very helpful!

I can't test tonight cause i'm off to see the Foo Fighters!
Will report back once I get some time to test.

cheers

[cornnatron]

No probs Drzeus

as to the new topic ill have a look after i get some reports
Back on how the files work for. People but
Then again i do think ill get more reports on it in its own topic
But i have to compile jasper and falcon files first
Havent made those jet

Cheers corn.

[crimpshrine]

I know things seem to vary often between Slim motherboards. One setup will work and give consistent 10 second boots but on another Slim will result in 2+ minute boots.

My experience with Falcons & Jaspers has been much more consistent.  Other then needing an extra cap here and there, have not found a unit yet that is slow at glitching.

My results so far from fiddling with changing + or - 1 or 2 results in no difference on 2 slims I have here.  Using a Coolrunner.

On one particular unit the best I have seen so far is a total of 34 cm on the reset wire.  (Anywhere from 8-30 seconds on booting pretty constant, and that is back in the case)  Thought I would see if I could run the shortest wire possible for the reset wire and change the CPLD code, I was surprised to get a glitch in like 5 seconds the first and second boot, but then never being able to reproduce that again.   That was with +1, any of the others I tried never got another successful glitch would only wait up to 50 seconds..  I believe if I let the unit sit for a length being off I might have been able to get a 5 second glitch again.  This is also with trying 3.3 constant, Vs 3.3 switched so when the 360 is off, the Coolrunner turns off too.

I would be curious if anyone else is able to adjust the CPU_RST wire to be very short while changing their WIDTH_RESET_START on a Slim and get it to boot consistently..  Out of 2 Slims I have NOT been able to achieve this.

My next test when I get time later is to get it back to where this one unit is booting in 8-30 seconds every time with the default trinity CPLD code, is to adjust it by -1 or +1 to see exactly what effect it has.

I started a thread on team-xecuter's forum yesterday to see if anyone has tried adjusting their timings on a Slim to see what their results are, no one has reported back yet..

http://team-xecuter....ead.php?t=77525

 

[cornnatron]

Well i got consistend times of 5 secs to max 15 secs
With the files i posted and a rst of 1inch where previusly
 20sec to 2min with 30 odd centimeter wire spliced
Tryed 50 to 20 cm wires spilced and onspliced and that was best i could get.
But that was with the matrix glitch chip.

[DBling]

Is there a way to simply convert the jed files to xsvf?

Thanks.

EDIT: It seems that impact will do that...

[Blackaddr]

QUOTE(cornnatron @ Dec 11 2011, 04:59 PM)

very much tnx for the tip blackaddr now booting 5sec constantly still sometimes takes 15 sec but no longer.
had to use +1 on mine with 1 inch cable and 270uf on matrix glitcher

here for the people who cant compile
trinity timing files cpld
explanation inside

Good job.  I bet it felt pretty damned good after modifying and compiling your own VHDL file and it worked.

This probably won't help everyone, but at least you can try different timings now.

[cornnatron]

QUOTE(Blackaddr @ Dec 18 2011, 11:56 PM)

Good job.  I bet it felt pretty damned good after modifying and compiling your own VHDL file and it worked.

This probably won't help everyone, but at least you can try different timings now.

well wasnt thirst thing i compiled had some histry with vb6 delphi6 and c# but that seems ages ago now
i know it wont work for every one but mine is killer now
longest ever boot was 26 sec now but 8/10 within 10sec from wich 5/10 within 5sec

so yeh for me worked +1 on matrix chip

[DrZeus]

Ok so finally got time to try the Zephyr timing files and tried them all and no difference, no glitch
I'm 100% everything else is good, it just seems some Zephyrs wont glitch

thanks for you help anyway

[ARY]

QUOTE(DrZeus @ Dec 21 2011, 10:39 AM)

Ok so finally got time to try the Zephyr timing files and tried them all and no difference, no glitch
I'm 100% everything else is good, it just seems some Zephyrs wont glitch

thanks for you help anyway

Try Falcon, Opus or Jasper timing file  

It's my timing pack (56 jed files).
http://depositfiles....files/ie3xhy872