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[Xbox-Scene]

The Xbox 360 GPU - Interview with B. Feldstein ATI VP Engineering-- Posted by XanTium on January 25 01:21 EST
From teamxbox.com:

Microsoft revealed that the Xbox 360 will feature a custom ATI graphics processor that clocks in at a blistering 500 MHz, with 48-way parallel floating-point dynamically scheduled shader pipelines and 10 MB of embedded RAM. Do all those numbers mean nothing to you? Don't worry.
We had the chance to interview Bob Feldstein, Vice President of Engineering, ATI Technologies, Inc., to learn more about the development and power of the Xenos GPU.

* TeamXbox: Before we continue, we never had the chance to clarify the correct name of the Xbox 360 GPU. Some call it Xenos, others C1. Sometimes it was known as R500. But the rumor was that ATI wanted to avoid that codename because it could make the Xbox 360 GPU look less powerful than ATI's R520 PC part. So, what is the Xbox 360 GPU codename?
* Bob Feldstein: The Xbox GPU had nothing whatsoever to do with the PC products. R500 was never an internal name for the Xbox. Internally we called the GPU, interchangeably, C1 and Xenos. C1 was a code name defined before we had the contract, Xenos was the project name after the contract was won - but C1 stuck in everyone's minds. Once we started calling it C1, it was hard to change.

* TeamXbox: The interface to the system's memory is 128-bit. Isn't this a bottleneck considering the bandwidth-intensive tasks performed in the GPU? Why was a 128-bit bus selected when PC parts already implement 256-bit buses in their high-end editions?
* Bob Feldstein: Excellent question because it gets to the heart of what is right in the system design. We have a great deal of internal memory in the daughter die referred to above. We actually use this memory as our back buffer. In addition, all anti-aliasing resolves, Z-Buffering and Alpha Blending occur within this internal memory. This means our highest bandwidth clients (Z, Alpha and FSAA) occur internally to the chip and don't need to access main memory. This makes the 128 bit interface to system memory, and the ensuing bandwidth, more than enough for our needs because we are offloading the bandwidth hogs to internal memory.

* TeamXbox: When the Xbox 360 GPU features were unveiled, Nvidia expressed doubts about unified shader architecture, particularly about its performance. Do you think Nvidia's comments are due to no Nvidia part, not even the RSX, having a unified shader architecture yet?
* Bob Feldstein: Oh yes. Very much so.

Read the whole 4-page interview on teamxbox.com.

[TexT]

Xenos is a beast!  (IMG:style_emoticons/default/cool.gif)

[Heet]

Yep its a lot of really neat hardware.





Wish they'd use it.

[Foe-hammer]

QUOTE(Heet @ Jan 25 2006, 03:24 AM)

Yep its a lot of really neat hardware.

Wish they'd use it.

 (IMG:style_emoticons/default/laugh.gif)
My thoughts, exactly.  Hopefully time will make the difference.

[Tobb555]

wow i didnt know the GPU was only 128-bit. I wounder how better if any it would have been if it was 256

[thax]

First details on the breakdown of bandwidth in the daughter die.

One frustrating thing is the transistor count on the daughter eDRAM, he states 90 million in has answer, the diagram shows 100 million and ATI told beyond 3D that the count was 105 million. 90 million seems impossible to me because that would mean they are able to store more than 1 byte per transistor, plus internal logic. The only explanation I can think of would be that the 90 million figure is for the logic only and doesn't include the transistor count for the memory.

Anyone have any ideas?

[KAGE360]

QUOTE(thax @ Jan 25 2006, 12:57 PM)

First details on the breakdown of bandwidth in the daughter die.

One frustrating thing is the transistor count on the daughter eDRAM, he states 90 million in has answer, the diagram shows 100 million and ATI told beyond 3D that the count was 105 million. 90 million seems impossible to me because that would mean they are able to store more than 1 byte per transistor, plus internal logic. The only explanation I can think of would be that the 90 million figure is for the logic only and doesn't include the transistor count for the memory.

Anyone have any ideas?

this is from Beyond3D...

QUOTE

One element that has been reported on is the number of 150M transistors in relation to the graphics processing elements of Xenon, however according to ATI this is not correct as the shader core itself is comprised from in the order of 232M transistors. It may be that the 150M transistor figure pertains only to the eDRAM module as with 10MB of DRAM, requiring one transistor per bit, 80M transistors will be dedicated to just the memory; when we add the memory control logic, Render Output Controllers (ROP's) and FSAA logic on top of that it may be conceivable to see an extra 70M transistors of logic in the eDRAM module.

http://www.beyond3d.com/articles/xenos/index.php?p=02

also i have trying to look but the search isnt making it easy on me, the transistor count has been counted since the final dev kits were released and i could swear that the total number is 382.  ill post a link if i ever find it.